Can anyone provide me with Ptype depletion mode (FET) diagram??
Answer:
http://encyclobeamia.solarbotics.net/art...
It's the 5th symbol up from the bottom.
EDIT after you comments:
I don't have a link to a picture, but I can describe it for you.
The substrate is p-type material.
The source and drain terminals are metallization over small wells of heavily doped n+
There is a very thin region of induced n+ material in between the source and drain directly under the gate oxide. This is formed by "grounding" the substrate (or on older devices applying a negative bias voltage), and applying a positive bias to the gate. this region is the depletion region (depleted of holes, and saturated with electrons, so it is conductive).
Now when an external voltage are applied to the gate, it will work 'against' the bias to further enhance or deplete that depletion region of electrons.
.
.
http://hyperphysics.phy-astr.gsu.edu/hba...
http://hyperphysics.phy-astr.gsu.edu/hba...
The answers post by the user, for information only, FunQA.com does not guarantee the right.
More Questions and Answers: